United Business Media EE Times




Search


HOMELATEST NEWSSEMICONDUCTORSMOST POPULARMARKET INTELLIGENCE UNITFORUMSDESIGNNEW PRODUCTSCAREERSBLOGSCONTACTEVENTSSIGN UP!RSS

 

Xanoptix stacks chips to create hybrid ICs








EE Times


SANTA CLARA, Calif.—Startup Xanoptix Inc. has developed a wafer-scale manufacturing process that allows silicon die, optical semiconductors and compound semiconductors such as gallium arsenide and indium phosphide chips to be stacked into three-dimensional structures to create hybrid ICs. The company is announcing its Hybrid Integrated Circuit Technology this week at DesignCon 2003 .

Xanoptix's wafer-scale micro-mechanical attachment process places multiple semiconductor die directly on top of a silicon wafer. The stacking technique will eventually combine a large numbers of lasers, detectors and/or transistors with third-party silicon ICs fabbed in a conventional foundry. "The resulting chips offer high integration density, low cost and reduced power consumption," said John Trezza, president and chief technology officer of Xanoptix, based in Merrimack, N.H.

"The practical integration of compound semiconductor functionality with silicon integrated circuitry has been an elusive goal challenging semiconductor device researchers for over 20 years," said Clifton G. Fonstad Jr., Vitesse professor of electrical engineering at MIT. "A manufacturable integrated circuit process that combines the unique performance of III-V and II-VI semiconductors with digital computational and memory prowess of silicon can enhance system performance over those made with conventional integrated circuits because it will allow designers to use, in one integrated chip, the best devices from multiple material systems and to integrate functions not available in any single material system."

Xanoptix's process can integrate thousands of devices in silicon or compound materials, such as GaAs or InP-based lasers, detectors, and transistors, with such third-party silicon ICs as transceivers, network processors and DRAMs. The resultant silicon may be fabbed in any conventional silicon foundry. A series of integration and post-processing steps ensures the proper attachment of the stacked materials.

Anybody's silicon

Xanoptix and its partner companies — Analog Devices Inc., Vitesse Semiconductor Corp. and Velio Communications Inc. — have already used the technology to create a number of different products. The company has also developed and licensed related packaging technology such as high-density MT ferrules. "But these products were a combination of our partners' and our technology," said Trezza. "We are now coming out of our semi-stealth mode and are announcing our capabilities to allow anybody's silicon combined with compound semiconductor devices such as lasers, sensors and detectors at the wafer levels."

The XTM series of optical transceivers that Xanoptix has produced have generated revenue for the past two years, Trezza said. The transceivers contain up to 36 transmit and 36 receive channels operating asynchronously at up to 3.4 Gbits/second per channel. Previous MT-style connectors could only hold up to 24 fibers. "We are now shipping chips with 180 active optical devices in less than one-twentieth of a square centimeter," Trezza said.

Xanoptix was founded in 1990 by Trezza and nine other collaborators formerly employed by Lockheed Martin. Many of the ideas for the hybrid IC manufacturing process were developed when Trezza was on the research faculty at Stanford University. The company received $40 million in its initial round of funding and another $40 million in a second round last year. Trezza said he is confident that funding will hold the company until 2004, when the first products taking full advantage of the hybrid IC technology become commercially available. Xanoptix now employees 50 workers.

Xanoptix runs a gallium arsenide facility where third-party silicon will be post-processed to create hybrid ICs, Trezza said.

"Creating three-dimensional, stacked structures from silicon or compound semiconductors through a highly manufacturable process is of great commercial importance," said chief executive officer James D. Norrod in a statement. "It allows the use of low-cost chip technology and mainstream silicon designs for applications that, up to this point, relied on expensive specialty processes."











  Free Subscription to EE Times
First Name Last Name
Company Name Title
Email address
  Click here for your Free Subscription to EETimes Europe
 
CAREER CENTER
Ready to take that job and shove it?
SEARCH JOBS
SPONSOR

RECENT JOB POSTINGS
CAREER NEWS
10 Search Engines You Don't Know About
Go beyond Google and get vertical. These specialized search sites will help you find the business information you need -- fast.

For more great jobs, career related news, features and services, please visit EETimes' Career Center.



All White Papers »   

  Around Silicon Strategies

How Samsung beat Japan Inc.: How Samsung made the transition from a consumer electronics dwarf to a global brand is a well-told story. Less well-known is the story of how Samsung achieved its current supremacy. More...

Is China into chips?: A few years and billions of dollars after Chinese companies stormed into the silicon foundry market, at least one analyst wonders if being a top player in the global chip business is still a Chinese priority. More...

Albany NanoTech goes clean: Seeking to replicate its success in semiconductors, R&D specialist Albany NanoTech and its parent organization are bringing its collaboration model over to clean technology. Will it work? More...

10 fab technologies on the hot seat: Our report lists 10 fab technologies that could make or break future IC scaling. These fab technologies are on the ''hot seat.'' Some are doomed to fail, while others are under pressure. More...

35 people, places & things: We are witnessing the integration of technology with society to an unprecedented degree. In this special report, we offer a glimpse of the next 35 years--what's coming down the pike, and how we might begin to make sense of it. More...

Top 10 predictions for semis in 2008: To help sort out chip market confusion, EE Times semiconductor editor Mark LaPedus offers his own chip forecasts--and other predictions--for 2008. So, what will happen to AMD, Freescale, IBM Micro, SMIC and others? More...

Market intelligence: Ethernet is poised to dominate all aspects of networking, but the new speeds will have effects that ripple out in various ways. That's the conclusion of one of several analysis reports available from EE Times Market Intelligence Unit. More...

Silicon 60 version 7.0 The EE Times 60 Emerging Startups list, first published in April 2004, has been updated to version 7.0 to reflect the latest corporate, commercial, technology and market conditions. More...

 

FEATURED TOPIC



ADDITIONAL TOPICS












Home | About | Editorial Calendar | Feedback | Subscriptions | Newsletter | Media Kit | Contact | Reprints|  RSS|   Digital|  Mobile
Network Websites
International
Network Features




All materials on this site Copyright © 2008 TechInsights, a Division of United Business Media LLC All rights reserved.
Privacy Statement | Your California Privacy Rights | Terms of Service | About