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USB 2.0 specification to spark new round of chips








EE Times


SAN JOSE ( ChipWire)-- The final Universal Serial Bus 2.0 specification is expected to be released next week at the Windows Hardware Engineering Conference in New Orleans, and to become available on the USB Implementers Forum Web site next Wednesday, EE Times has learned.

The release is expected to kick off a wave of chips that support USB 2.0, which will extend the full-speed transfer rate of USB from a possible 12 megabits per second in USB 1.1 up to 480 Mbits/sec.

The first systems using the 2.0 specification are expected to debut for the Christmas PC selling season, and a number of companies are expected to announce 2.0 silicon at the USB Developers Conference, planned for May 15-18 in Anaheim, Calif.

NEC Corp. took an early plunge in mid-April, unveiling a USB 2.0 host controller that supports the full 480-Mbit/sec. data transfer rate. NEC is sampling the device this month and plans to begin commercial production in September. NEC's silicon is backward compatible with the full-speed USB 1.1 standard, as it incorporates two USB 1.1 controllers that will double the 12-Mbit/s speed limit of peripherals that conform to the USB 1.1 spec.

The physical layer on the NEC controller supports the full 2.0 transfer rate, and can dynamically configure the bandwidth according to the speed capabilities of the connected devices, an NEC spokesman said.

The USB initiative has enabled far simpler connections of peripherals to personal computers, compared with serial ports or SCSI links. Because the connections can be made while the host system is up and running, USB has been one of the true success stories in making PCs easier to use.

Jason Ziller, an Intel Corp. manager who heads up the USB 2.0 promoter's group, said the new spec, with data rates of 60 megabytes/sec., is about 40 times faster than the USB 1.1 specification.

The higher bandwidth will enable applications such as interactive games and digital image creation, and will be used in scanners, printers, external storage devices and broadband Internet connections. A gigabyte of data can be backed up in less than a minute to an external drive with USB 2.0, for example. Also, a high-density flash card containing dozens of high-resolution images can be downloaded from a digital still camera to a computer in a matter of seconds, Ziller said.

The emerging field of Internet appliances is also leaning heavily on the USB interface. A network appliance being developed by IBM Corp. has seven USB ports, according to one source.

The 2.0 spec calls for the same cables and connectors used in the 1.1 standard, but the voltage swing in the controllers has been cut to 400 millivolts, from 3.3 V in the version 1.1 USB chip sets. Also, dual termination is required on both ends of the wire.

While the first generation of 2.0-enabled systems is expected to stick with the 480-Mbit/sec. transfer rate, some companies already are planning to push the 2.0 specification higher, according to one source, who asked not to be identified. However, that won't happen until well into 2001, when 2.0 is expected to gradually supplant the 1.1 specification.

To help bridge the gap, Cypress Semiconductor Corp., of San Jose, has developed a line of USB 1.1 controllers that support burst transfers of data, typical in storage or video cameras, at up to 48 Mbytes/sec. -- not much slower than the 2.0 limit of 60 Mbytes/sec. The so-called "FX" (Faster, Extended) line builds on the basic architecture of the Cypress 8051-based EZ-USB controllers, which are based on technology gained in the May 1999 acquisition of Anchor Chips, a fabless USB company in San Diego(see April 17 story).

The acquisition of Anchor, and a separate deal to acquire Intel's USB silicon operation last year, put Cypress in the lead in terms of USB silicon sales. The company expects to ship about 16 million USB controllers this quarter, said Allyn Pon, a former Anchor executive who is now the marketing director of the interface products division at Cypress.

The FX line of USB host silicon provides a migration path to the 2.0 spec, Pon said. The seven parts in the FX line are sampling now and go into full production in July, priced in the $7 range.

Pon said the FX controllers support the 16-bit transfers needed for mass-storage peripherals, as well as for the Phone Networking Alliance standard. Timing -- including the CTL (control) and RDY (ready) functions -- is programmable. Direct memory access to external memory can buffer up to 64 Kbits of data, needed to sustain the USB transfer rate in bursty applications.

The FX silicon shaves packaging costs by using a plastic quad flat pack with fewer pins than needed for the 2.0-compliant silicon, Pon said, and thus are 25% less expensive. FX devices are offered in packages with 48 to 128 pins.

"The 2.0 silicon can vary in cost much more than the 1.1 controllers. And the FX is also about time-to-market," Pon said. Companies are designing-in the 1.1-compliant FX silicon now in order to more quickly get systems to market that can support the higher-performance peripherals, he said.











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