LSI Logic's new foundry strategy is part of the company's partnership to jointly develop 0.13-micron copper processes with Taiwan Semiconductor Manufacturing Co. Ltd. Under an agreement announced on Wednesday (April 4), LSI Logic will adopt TSMC's 0.13-micron technology and use Taiwan foundry for a significant portion of its copper-chip volumes (see April 4 story).

The joint-development project will combine LSI Logic's transistor modules and other front-end-of-line (FEOL) processes into TSMC's 0.13-micron copper and low-k dielectric technology, which has been in early production since December. In the next few months, LSI Logic plans to make new design libraries available to customers for the copper processing. Early prototypes from TSMC will be produced in the third quarter of 2001. Volume production at TSMC will begin by the end of this year.

The partners expect to move the jointly developed 0.13-micron process to LSI Logic's fab lines by late 2002 or early 2003, said Ronnie Vasishta, vice president of technology marketing at LSI Logic. The new 0.13-micron copper process could also be made available to LSI Logic's other foundry partner, Silterra (Malaysia) Sdn. Bhd. in Kulim. The Malaysian foundry startup is using LSI Logic's existing 0.25-micron process to enter the business.

"LSI Logic has been working on copper for sometime now, and we made a decision to transition over from aluminum to copper interconnects at 0.13 micron because it was now feasible," Vasishta said. "But in doing that, we were faced with a decision--how should we make the transition?

"We decided the best way to quickly ramp copper into production was to combine development with a manufacturing alliance," he explained. "TSMC was already running this type of capability at 0.13 micron. We wanted to make sure we had a manufacturing partner, and so this is not just a drive to copper. We had been toying with the issue of whether we do copper internally or externally with a foundry."

In developing the company's next-generation process technologies, LSI Logic had earlier opted to emphasize low-k dielectrics, while staying with conventional aluminum metal interconnects. Last year, in fact, LSI Logic announced plans to offer a 0.13-micron low-k aluminum process, called Gflx (see March 17, 2000, story). LSI Logic's low-k dielectric work has been based on process tools and technologies from Trikon Technologies Inc. of Newport, Wales.

But now LSI Logic has decided it's time to shift to copper from aluminum metal, and it is going to use TSMC's 0.13-micron dual-damascene processes for those interconnects, which also employ a low-k dielectric technology from Applied Materials Inc. The TSMC 0.13-micron process achieves a dielectric-k rating of 2.9 using Applied's Black Diamond thin films, which are deposited by chemical vapor deposition (CVD) tools (see Jan. 18 story).

"This does not mean LSI Logic is going to stop low-k and interconnect process development internally," Vasishta said. "We will continue to work on technology internally Trikon."

However, the move to TSMC's copper process will mean LSI Logic will eventually deploy Applied's Black Diamond CVD tools in its own fab lines.

Until the 0.13-micron node, LSI Logic believed low-k dielectrics in combination with aluminum "was the best way to go, in terms of learning how these materials interact," explained Vasishta, referring to the industry's major challenge in developing a replacement for silicon-dioxide insulators and aluminum metal. But the move to copper has accelerated, causing LSI Logic to change its plans for 0.13-micron technology.

"Over the course of the past year, we have seen an acceleration of true low-k and copper. It has become quite prolific, and we now anticipate that all 0.13-micron technologies will be on a basis of true low-k and copper," he said.

For TSMC, the alliance with LSI Logic provide an opportunity to gain a major foundry customer as well as add transistor modules to its basic 0.13-micron process for a broader customer base, said David Keller, vice president of business management for the Taiwan foundry giant.

"We are a pure play foundry and do not have any products. In order to develop the broadest process technology portfolio, we partner with industry leaders," Keller explained. "We have been in production of 0.13 micron technology since December of last year. In this new partnership, LSI Logic is going to be contributing some specific technology that will help broaden TSMC's market penetration and fill out applications further. This is a standard way that TSMC does its process development, to hit the broadest array of markets."

Among the modules to be integrated into TSMC's 0.13-micron process will be LSI Logic's Gflx mixed-signal mode transistors and a range of gates for low-power and high-performance transistors. The process will be optimized for 1.2-volt transistors--both high speed and low-power consumption. The technology will use 0.12-micron drawn gate lengths and offer up to eight layers of copper interconnect with low-k dielectric insulators.