HSINCHU, Taiwan -- United Microelectronics Corp. today announced availability of a new design option for its 0.13-micron logic foundry process, called "Fusion," which UMC said combines high-speed and low-power transistors for system-on-chip ICs using a low-k dielectric spin-on film for interconnects.
The Fusion option is part of UMC's "WorldLogic" CMOS process, which has been developed under a partnership between the Taiwan foundry company, IBM Corp., and Infineon Tecnologies AG (see Nov. 28 story). The copper process uses a spin-on organic dielectric material, called SiLK, from Dow Chemical Co. to achieve a dielectric constant rating of 2.65 for high-speed interconnects on large ICs, according to UMC.
UMC said the low-K SiLK material will provides a performance advantage of up to 30% over competing foundry processes for wire speed delay and power reduction. UMC and its WorldLogic partners have opted to use spin-on dielectrics at the 0.13-micron process node while others--such as Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC)--have gone with thin-film materials processed by chemical vapor deposition (CVD) tools.
The new option will enable more transistors and functions to be packed on a single IC for a broader range of wired and wireless applications, said Jim Ballingall, vice president of worldwide marketing for UMC. The higher levels of chip integration will eliminate the needs for cooling fans and complex IC packages as well as extend the life of batteries in portable systems, noted Ballingall, who is based in Sunnyvale, Calif.
UMC said the new 0.13-micron process combines copper metal interconnect and the SiLK dielectric for insulators to enable a chip density of 220-K gates/mm2.
