AUSTIN, TEX. -- Barriers in photomask production and technologies have become so challenging that International Sematech has decided to dedicate more than half of its lithography R&D budget to solving problems in mask making and reticle materials, said the Austin-based semiconductor consortium.
"The challenges of mask making have broadened in scope and deepened in complexity in the last decade," said Kurt Kimmel, program manager for Sematech's Mask Strategy Program. "The problems now go beyond just masks -- it's all about optimized image delivery.
"There has to be a strong partnership between the mask makers and lithographers," urged Kimmel, who spoke recently at the 18th Annual European Mask Conference.
Kimmel said the limited market size for photomask production equipment makes it difficult to build a strong business that's capable of investing enough money to keep up with the International Technology Roadmap for Semiconductors.
"That market must be supported if lithography and semiconductor growth are to continue at the same speed that they always have," Kimmel said.
To help maintain the pace, Sematech said it has adopted a mask strategy that is even more aggressive than the chip industry's roadmap for 70-nm and 50-nm process technology nodes, which are scheduled for introduction to manufacturing in 2005 and 2007, respectively. The international R&D consortium plans to use emerging lithography technologies in testing and developing photomasks for these two nodes.
For the 70-nm node, Sematech plans to utilize 157-nm optical lithography technology, and for the 50-nm node, it will use a next-generation lithography (NGL) technology, such as extreme ultraviolet (EUV) systems or, perhaps, electron-beam projection lithography (EPL), Kimmel said.
"Of the four programs inside the Sematech Lithography Division-- 157-nm lithography, NGL development, resist development, and mask strategy--three have substantial mask issue content," Kimmel said.
He noted that the semiconductor industry is also exploring ways to make the use of photomasks more efficient, especially for relatively low-volume wafers where reticles can result in significant cost issues as mask sets push toward the $1 million price tag. "Combining multiple customers on a single mask has been implemented with success in the foundry business," observed Kimmel, referring to multi-project wafers that pack different chip designs on a single substrate to share processing costs for prototyping and low-volume products.
"But optimization of specifications, field size utilization, and matching of fabrication process to imaging are among the options being explored," he added.
Kimmel also suggested that additional information about the potential market volumes should be included with the chip design data that is sent to photomask shops, foundries, and wafer fabs for production.
"It may be time that, for every mask order that reaches the mask fab, along with the data file and the specifications, there should be the wafer business case parameters attached," he proposed. "Then business and technology-based decisions about mask type, compliance to specifications, and fabrication process can be optimized for the bottom line: profit at the silicon level."
