SAN FRANCISCO — The possible use of optical interconnects on silicon ICs drew a skeptical response from a panel at the International Solid-State Circuits Conference Monday (Feb. 4). Seen as a possible savior for future I/O-limited high-performance devices, optical interconnects were dismissed by several panelists who said the interconnect problem has been overstated.
Metal wires may prove to be scalable and able to provide acceptable performance far longer than some have predicted, several panelists said.
Ian Young, an Intel Corp. fellow and moderator of the panel, titled "When will optical interconnects appear on high-performance processors?" framed the problem by reminding the audience of Rent's rule, which states that a doubling of transistor density increases wiring complexity by a factor greater than two. Device complexity leads to "pressure for ever more layers of interconnect," Young said. Noting the case of a process that uses low-k intermetal dielectrics and copper wires, Young said that some companies "don't see the 30 percent reduction" in resistance-capacitance delays, perhaps because of via resistance.
Alena Deutsch, a member of the staff at IBM Corp.'s T.J. Watson Research Center (Yorktown Heights, N.Y.), said today's microprocessors are moving from the gigahertz range, with interconnects capable of handling 2.5 gigabits/second, to processors operating in the 10-GHz range.
By optimizing the thickness and spacing of on-chip interconnect, and carefully guarding the quality of the shielded cable and printed circuit board for chip-to-chip and system-level interconnect, Deutsch said that "10 to 15 gigahertz is already quite implementable."
Sam Naffziger, a senior engineer at Hewlett-Packard Co.'s microprocessor development center in Fort Collins, Colo., also endorsed the future of metal interconnects, and downplayed the commercial potential of optical interconnects over the next decade at least.
Calling himself a person who had to "recover the costs" of technology developments, Naffziger said "putting optical waveguides on-chip presents too big of a technical hurdle and is not going to pay off."
Mark Horowitz, a Stanford University professor and a cofounder of Rambus Inc. (Mountain View, Calif.), said he has come to believe that packaging issues are in many cases the limiting factor in overall device and system performance. Taking an optical waveguide through an MPU's heat sink or power grid, for example, would prove difficult, he said.
Optical waveguides are difficult to implement in silicon. Stanford professor David Miller, a leading researcher of optical interconnects, said, "There is not a very good way to make an optical emitter or modulator in silicon. Another approach is to take a finished silicon die and use solder bonding to attach an optical device created in a compound, III-V type device."
At some point, researchers might be able to connect an optical fiber directly to silicon for 10-Gbits/s and greater bandwidth, Miller said.
More heat
Christer Svensson, a professor at Linkoping University in Sweden, said he failed to see any merit to optical interconnects, except for long distances.
Optical links are not faster, since both electrons and photons travel at near the speed of light, and optical links draw more power. "Why on earth would anyone want to use an optical interconnect?" he asked.
