The R&D partnership is aimed at moving silicon-on-insulator (SOI) and other advanced semiconductor process technologies into cost-sensitive consumer electronics ICs, according to the partners.

Under the plan, the companies intend to spend "several hundred million dollars" over four years to co-develop 90-nm (0.09-micron), 65-nm (0.065-micron), and 45-nm (0.045-micron) chips based on several advanced process technologies and materials, such as SOI wafers, copper-metal interconnects, and low-k dielectrics.

In addition, IBM will transfer its SOI technology to Japan's Sony and Toshiba. A team of scientists and engineers from IBM, Sony, and Toshiba will co-develop SOI technologies and devices at IBM's Semiconductor Research and Development Center (SRDC), based in East Fishkill.

Each party will have the ability to build advanced chips based on SOI and other technologies in their own, respective fabs, said Bijan Davari, IBM Fellow and vice president of technology and emerging products for IBM's Microelectronics Division.

The collaboration will also lead to the development of high-performance, low-power chips for use in everything from digital consumer applications to supercomputers, Davari told SBN.

IBM, Sony, and Toshiba will play a major role in the alliance. Toshiba will provide its system-on-a-chip (SoC) and manufacturing expertise, while Sony will guide the technology efforts and leverage the processes for its consumer devices.

IBM will leverage its pioneering work in SOI, copper, and low-k and could become a key foundry provider in the alliance. A significant portion of IBM's soon-to-be-completed, 300-mm wafer fab in East Fishkill will be dedicated to these new processes. In 2000, IBM announced it would invest $2.5 billion in the 300-mm fab as part of a $5 billion capital spending plan (see Oct. 10, 2000 story ).

In another key part of the alliance, IBM is also quietly readying its 90-nm (0.09-micron) process "by the end of the year," Davari said. The chip maker has presented papers about its 90-nm process, but has yet to announce the technology, he said. It also expects to develop chips at the 65-nm (0.065-micron) and 45-nm (0.045-micron) nodes by 2004 and 2006, respectively, he added.

To help it achieve its process technology goals, IBM will expand its ties with Sony and Toshiba. Last year, the companies announced plans to spend more than $400 million to develop a "supercomputer-on-a-chip" architecture for fast broadband network processors in consumer electronics applications. The highly integrated ICs--code-named "Cell"--will used 0.10-micron design rules (see March 12 story ).

Sony will use IBM Microelectronics' "Cell" architecture for its PlayStation 3 launch slated for next year, according to sources close to the collaboration (see March 22 story ).

Today's announcement takes the IBM-Sony-Toshiba alliance a step further, according to Davari. "There is a connection to the "Cell" architecture, but it's a different alliance," he added.

In fact, the companies dropped hints that they could develop a range of future devices for networking and consumer applications. "The PC is no longer the driving force in semiconductor innovation," said John Kelly, senior vice president and group executive for the IBM Technology Group. "Networking and consumer electronics applications are driving the evolution of a new semiconductor industry," Kelly said.

"Incorporation SOI and other cutting-edge process technologies into various audio, visual and IT products as well as to the computer entertainment system, is expected to bring even higher competitive power to the entire Sony Group," said Ken Kutaragi, president and CEO of Japan's Sony Computer Entertainment and director of Sony.

"We will apply SOI process technology to broadband processor-based LSI for such applications as a high-speed homegateway and future low-power mobile products," said Takeshi Nakagawa, corporate senior vice president and president of Toshiba's Semiconductor Co.

--Mark LaPedus reporting from Silicon Valley in the U.S.