HSINCHU, Taiwan -- Altera Corp. plans to extend its long-standing technology alliance with Taiwan Semiconductor Manufacturing Co. Ltd. here to develop programmable logic devices at the 90-nm (0.09-micron) process node.
San Jose-based Altera today said it will leverage TSMC's Nexsys 90-nm process technology for next-generation PLDs, and it expects to see a 30% performance increase from the copper-based process, which was announced earlier this month (see April 9 story). TSMC plans to begin early "risk" production of copper-based 90-nm ICs for technology partner during the third quarter of this year.
"Altera's PLD products have a unique combination of features--high-density, high-performance transistors, dense interconnects, and well-characterized memory structures--that are ideal for optimization to new process geometries," stated Francois Gregoire, vice president of technology at Altera.
TSMC said Altera's engagement in its R&D for development design rule definitions in the Nexsys 90-nm process began early in the development cycle. With Altera's input, TSMC said it was able to specify a process that supports the San Jose company's PLD products.
"Our collaboration with Altera stretches back to the beginnings of both companies," said Genda Hu, vice president of marketing for TSMC.
"The collaboration will enable optimized transistors, increased performance, and a reduction in standbypower, all on 10 layers of copper and featuring low-k dielectrics," stated the foundry's marketing VP.
