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Merger talk swirls around CoDesign








EE Times


SAN MATEO, Calif. — As companies making system-level design tools struggle to stay afloat, talk on the street is that some of the larger EDA companies might be thinking of acquiring Superlog IC-language inventor CoDesign Automation, knowledgeable sources told EE Times. Synopsys and Cadence Design Systems are both being cited as possible suitors.

According to one source close to CoDesign, Synopsys Inc. has already closed a deal to buy CoDesign. Another source said Synopsys and CoDesign are still negotiating.

Simon Davidmann, president and chief executive officer of CoDesign, declined to comment about rumors that his company is about to be acquired, or about the current state of CoDesign. "At the moment, there is no story we want to talk about and so I don't want to give a comment about anything," he said.

A Synopsys spokesperson said the company "does not comment on potential M&A [mergers and acquisition] activity."

Cliff Cummings, president of tiny design services group Sunburst Design and an investor in CoDesign, said he has not been informed about a possible acquisition. Cummings, who is also an active member of Accellera's System Verilog committee, said he does not believe the rumors, but he conceded that negotiations could be taking place and simply hadn't been solidified.

"Unless the price was really good, I don't think Simon Davidmann would sell his company," Cummings said.

One source suggested that Cadence, not Synopsys, may be CoDesign's suitor. A Cadence spokesperson cited company policy not to comment on rumors.

An acquisition by Synopsys likely would throw into question the future of CoDesign's next-generation hardware/software IC co-design language, Superlog, and that of the Synopsys-backed SystemC language. Until now, backers of the two languages have been butting heads over which one of them should succeed hardware-description languages Verilog and VHDL as the next advance in language abstraction.

Nod from Accellera

Superlog has gained a fair amount of backing in the user community and has earned encouragement and acceptance from Accellera, the industry standards group, as the next-generation Verilog.

Earlier this year, Accellera released its next-generation System Verilog 3.0 specification. This new version contains most of the Superlog language, with the exception of smaller features such as pointers, abstract communiation between testbenches and a mailbox facility, which CoDesign did not donate to Accellera's System Verilog effort. Synopsys tried to fill that hole by contributing constructs from its Vera Testbench. That donation, said Dennis Brophy, chairman of Accellera, suggests that Synopsys will not likely kill Superlog in favor of SystemC, which is run independently by the Open SystemC Initiative.

"Now that Synopsys will soon own both languages, they have already shown a desire and a commitment to push System Verilog in a direction that would only be in line with opening up more of the Superlog language," Brophy said.

Gary Smith, an EDA analyst at Gartner Dataquest, said that Synopsys is likely preparing a road map to forward System Verilog and Superlog as the system-level languages for the short term — an immediate improvement to Verilog — and then revert to SystemC as the system-level follow-up to Superlog.

Indeed, Brophy noted that the two languages could coexist, since System Verilog is seeing greater adoption from CPU and MPU designers, while SystemC is finding favor with DSP designers. "I think in the end, if there is going to be one language that succeeds — and I don't think that is going to happen — System Verilog is going to have to find greater usage outside the CPU computer space because it is based on Verilog," he said. For SystemC to break out of the DSP space is "a bit more challenging because the whole semantic notion of SystemC today is hardware based; it is a hardware dialect of C, not a hardware/software type of dialect."

Industry watchers said they wouldn't be too surprised if CoDesign were struggling. Although the larger EDA companies and smaller public EDA firms have fared well in the economic downturn, some startups, especially in the system-level language space, have disappeared.

C-Level Design, another system-level tool startup, closed its doors and sold all its assets to Synopsys at the end of 2001 when it failed to secure additional venture funding. In February, system-level company Cynergy Systems Design folded, and earlier this month, C-language design firm Celoxica laid off 10 percent of its work force.











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